Develop Algorithms with Live Video Capture
Use the video capture blocks to import live video into your Simulink® model. Then, add frame-based vision processing algorithms from Computer Vision Toolbox™ or pixel-streaming algorithms from Vision HDL Toolbox™.
Blocks
| Video Capture HDMI | Import live video frames from HDMI FMC card on Zynq-based hardware (Since R2023a) |
| Video Capture MIPI | Import live video frames from MIPI CSI-2 card on Zynq-based hardware (Since R2022b) |
| Video Capture USB | Import live video frames from one or more USB cameras on Zynq-based hardware (Since R2024b) |
| Deinterleave | Convert interleaved CbCr frame to separate components |
| Interleave | Convert separate Cb and Cr components into interleaved CbCr frame |
Topics
- Create Model Using Simulink Templates
Get started with a model configured for HDMI video processing.
- Zynq Video Dataflow for HDMI Input
Learn about the video data path through the Zynq® board when connected to an HDMI FMC card.
- Zynq Video Dataflow for MIPI Input
Learn about the video data path through the Zynq board when connected to a MIPI® CSI-2® FMC card.
- Design Frame-Based Algorithms
Create a Simulink model for frame-based video processing.
- Design Pixel-Streaming Algorithms for Hardware Targeting
Create a Simulink model for pixel-streaming video processing using live input from a camera.
Related Information
- Streaming Pixel Interface (Vision HDL Toolbox)
Featured Examples
Corner Detection with Zynq-Based Hardware and MIPI Sensor
Target a corner detection algorithm to a ZCU106 device with a MIPI® add-on card by using the SoC Blockset™ Support Package for AMD® FPGA and SoC Devices.
Corner Detection and Image Overlay with Zynq-Based Hardware
Target corner detection algorithm to the Zynq® hardware using the SoC Blockset™ Support Package for AMD® FPGA and SoC Devices.
MultiPixel-MultiComponent Streaming with Zynq-Based Hardware
Target multipixel multicomponent algorithm to the Zynq® hardware using the SoC Blockset™ Support Package for AMD® FPGA and SoC Devices.
Gamma Correction with Zynq-Based Hardware
Target gamma correction algorithm to the Zynq® hardware using the SoC Blockset™ Support Package for AMD® FPGA and SoC Devices.
Image Sharpening with Zynq-Based Hardware
Target image sharpening algorithm to the Zynq® hardware using the SoC Blockset™ Support Package for AMD® FPGA and SoC Devices.
Bilateral Filtering with Zynq-Based Hardware
Target bilateral filter algorithm to the Zynq® hardware using the SoC Blockset™ Support Package for AMD® FPGA and SoC Devices.
