Parameter Configuration for Analysis
What is Parameter Configuration for Analysis?
Simulink® Design Verifier™ software can treat parameters in your model as variables during its analysis. For example, suppose you specify a variable that is defined in the MATLAB® workspace as the value of a block parameter in your model. You can instruct Simulink Design Verifier to use additional values for that parameter in its analysis.
You can achieve this by placing a constraint on a parameter in your model, during analysis that parameter takes only your specified constraint value or values. A group of constraints on parameters in the same model is also called a parameter configuration.
This allows you to, for example:
Extend the results of design error detection or property proving analysis to consider the impact of additional parameter values.
Generate comprehensive test cases for situations in which parameter values must vary to achieve more complete coverage results. For more information, see Specify Parameter Configuration for Full Coverage.
Simulink Design Verifier provides the following workflows to specify parameter configuration:
Parameter Configuration Workflows
Parameter Configuration | How to Select Parameters Constraints? |
---|---|
Treat all parameters as constants | Retains the initial value for all parameters during the analysis. Thus, analysis considers all parameters as constants. |
Automatically infer parameter specification | For each parameter, the minimum or maximum value configured
in When test generation target is Model, Simulink Design Verifier selects as many parameters as possible for parameter configuration. When test generation target is Code Generated as Top Model or Code Generated as Model Reference, parameters whose value can be changed in the generated code are selected for parameter configuration. See Automatically Infer Parameter Specification. |
Determine from generated code | Parameters whose value can be changed in the generated code are selected for parameter configuration during the analysis. For such parameters, the minimum or
maximum value from |
Use parameter table | Parameters and constraints in the parameter table must be specified. See Use Parameter Table |
Use parameter configuration files | Parameters and constraints in the input file must be specified. See Use Parameter Configuration File |
Simulink Design Verifier does not support varying these parameter types:
Parameters that are read-only in the generated code
Parameters defined as MATLAB variables in Data Dictionary
Parameters from variant blocks
Parameters that are not of the type
numeric
,logical
, orfixed-point
Parameters with complex values
Parameters used in Array of Buses
Parameters used by model specific parameters
Parameters used in Inport and Outport blocks
Parameters whose value is specified by using
Simulink.ValueType
objectParameters from these blocks:
Lookup
Lookup_n-D
LookupNDDirect
Interpolation_n-D
Lookup Table Dynamic
Pre-lookup table
Saturation
Selector
For Iterator
Switch case
Discrete integer block
Parameters that are used in both design model and observer model
Specify Parameter Constraints for Models Using Referenced Configuration Set
If your model uses reference configuration set, you can use Override capability to specify parameter constraints. Before you work with parameter table in a referenced configuration set, follow these steps:
Open the model.
On the Design Verifier tab, click Settings to open the Configuration parameters window. The Configuration parameters window shows the Configuration reference for the model.
Click on Parameters and Variants from Design Verifier pane.
To edit and save the constraints locally, right-click on the Parameters configuration and select Override.
Similarly, override the values in Parameter table. Right-click in the Parameter table area and select Override and specify the values for the model by clicking on Find parameters.
The Parameter table area highlights the override settings for the model.
You can perform the analysis after specifying the values for the parameter table. For more information on how to specify constraint values, see Use Parameter Table.
Data Types in Parameter Configurations
Consider the following issues related to data types when constraining parameter values:
Parameters Defined as
Simulink.Parameter
and Referenced by Multiple LocationsTuning Array of Structure or Bus Data types are not supported
Parameters Converted to Fixed Point in the Model
If your model references a base workspace parameter whose data type is
auto
, single
, or
double
, and the model converts that parameter to a
fixed-point data type, you must define the constraints for that parameter
according to its fixed-point type.
Parameters Defined as Simulink.Parameter
and Referenced by Multiple Locations
For a parameter defined as Simulink.Parameter
or an
inherited class of Simulink.Parameter
whose data type is
auto
, if the parameter is referenced by multiple
locations with different data types, Simulink
Design Verifier cannot generate values for that parameter during the
analysis.
Complex Data as Parameters not Supported
If the data type of a parameter in the MATLAB workspace is complex, Simulink Design Verifier does not support generating values for that parameter during the analysis.
Tuning Array of Structure or Bus Data types are not supported
Simulink Design Verifier does not support tuning array of structure or bus data types during the analysis.
Parameters in Variant Blocks
Parameters can be used to select variants in the model by using variant blocks such as Variant Subsystem, Variant Source and Variant Sinks.
Simulink
Design Verifier supports only active variant for blocks the where Variant
activation time parameter is not set to startup
.
For blocks where Variant activation time is
startup
, Simulink Design Verifier analyzes all variants when
you select Analyze all Startup Variants under Design Verifier > Parameters and Variants in Configuration Parameters dialog box.
To analyze a model that contains variant constraints, open the Launch Variant Manager. Use the Variant Manager to run predefined configurations for a model, and use the model under any of the configurations. The Simulink Design Verifier analysis report includes the results information about the variants block.
Simulink
Design Verifier does not support block replacement in models that contain model
reference with startup
variants.
To perform the Simulink
Design Verifier analysis on variant blocks with Variant activation
time set to startup
, see Verify and Validate Variant Models with Startup Activation Time.
See Also
Variant Manager for Simulink | Variant Activation Time for Variant Blocks