Design IBIS-AMI Models to Support Clock Forwarding

This example uses:

This example shows how to create Rx AMI models that support clock forwarding as defined in the IBIS 7.1 specification by modifying the library blocks in SerDes Toolbox™. This example will use a DDR5 write transfer (Controller to SDRAM) to demonstrate the setup.

Background

The IBIS 7.1 specification adds the ability pass in an external clock signal, either as a waveform or clock-times, to a data IBIS-AMI receiver GetWave model, using the clock_times pointer as defined in the IBIS specification. A new AMI Reserved Parameter, Rx_Use_Clock_Input, is used to enable this functionality.

The figure below shows a typical DDR5 coupled channel simulation setup using clock-forwarding. The clock times or waveform generated by DQS0 is passed to DQ[7:0] (DQ0, DQ1... DQ7) using the DQ Rx DLL’s clock_times pointer. The DQ Rx DLL then operates on these clock times as desired (for example triggering DFE taps, modelling the DQS clock delay tree or centering the DQ on the DQS waveform) and then passes out the same or modified clock_times as usual. This same process is repeated for DQS1 and DQ[8:15].

This example provides an introduction to clock-forwarding in SerDes Toolbox and shows how to use various Simulink® tools and MATLAB® functions to generate and test an IBIS-AMI executable that supports clock-forwarding. It does not provide a specific clock-forwarding algorithm.

Rx IBIS-AMI Model Setup in Simulink

To begin, load the clock forwarding Simulink model and review the model setup. Start by typing the following command:

>> open_system('dq_clock_forward.slx')

This will bring up the following SerDes system:

Review Simulink Model Setup

In addition to the normal SerDes Configuration, Stimulus, Tx, Analog Channel and Rx blocks, this Simulink SerDes system adds a new Strobe Clock Times Generator block. The setup of each of these blocks will be reviewed below.

Configuration Block

Symbol Time is set to 200.0 ps (5.0Gbps)
Target BER is set to 1e-16.
Signaling is set to Single-ended.
Samples per Symbol and Modulation are kept at default values, which are 16 and NRZ (nonreturn to zero), respectively.

Stimulus Block

The Stimulus block has been modified to point to the custom stimulus pattern SILinkStimulus_dq.

Tx Block

The Tx block uses a single FFE with 5 taps. Since this example is focused on the Rx model, the Tx block will be untouched.

Analog Channel Block

Channel loss is set to 5 dB, which is typical of DDR channels.
Single-ended impedance is set to 40 ohms.
Target Frequency is set to 2.5 GHz, which is the Nyquist frequency for 5.0 GHz
The Tx Analog model is set up so that Voltage is 1.1 V, Rise time is 10 ps, R (output resistance) is 50 ohms, and C (capacitance) is 0.65pF.
The Rx Analog model is set up so that R (input resistance) is 40 ohms and C (capacitance) is 0.65pF.

Rx Block

The single Rx block is a pass-through block that consists of a DFE System Object, a CDR MATLAB function block and a Clock Times block. The DFE block is set up for four DFE taps. The first tap has the Initial tap weight set to -0.1 (so it's visible in simulation), while the remaining Initial tap weights are set to 0. The Minimum tap value is set to [-0.2 -0.075 -0.06 -0.045] V, and the Maximum tap value is set to [0.05 0.075 0.06 0.045] V.

Per the IBIS 7.1 specification, the clock times received by a clock-forwarding data receiver are used directly, therefore there no clock recovery is required when Rx_Use_Clock_Input is set to "Times" or "Wave". In place of the CDR, a MATLAB function block named forwardCDR is used to pass the clock times to the DFE, which signals when to apply the DFE taps. In addition, this block passes the clock times, unchanged, to the IBIS-AMI clock_times block to generate the normal clock times for use by the EDA tool. The MATLAB function block can be copy-pasted from this example into your own Simulink model.

The Clock Times block is a SerDes Toolbox library block which formats the clock-times generated by the DFECDR, CDR or forwardCDR block for output to the EDA tool. This library block is available from the Simulink Library Browser.

The DFE block is a custom SerDes Toolbox system object. It can be added to your own Simulink model by adding a MATLAB System block and then pointing it to the DFE.m file included in this example.

The CDR block is a standard SerDes Toolbox system object. When Rx_Use_Clock_Input is set to "None", the CDR outputs clock-times for the Clock Times library block. This is selected by the Forward Clock Times Data Store Read block and the four Switch blocks. Note that the CDR block is required in order for the model to output clock-times per the IBIS-AMI specification when clock forwarding is not being used.

Strobe Clock Times Generator Sub-System

The Strobe Clock Times Generator Block either reads a named clock stimulus pattern stored in the Model Workspace or reads in an array of clock times named clockTicks which is also stored in the Model Workspace. The mask for this sub-system is used to select which input to use and to set the name of the external clock stimulus pattern.

You can add the Strobe Clock Times Generator subsystem to a new Simulink model by copying it from this example. Copying this subsystem into a new SerDes model will also add the required Rx_Use_Clock_Input parameters and ForwardClockOffset Simulink signal to the Model Workspace.

Run the Simulink Model

The Simulink model is ready to run. In order to make the effects of the clock location more visible, the first DFE tap has been set to -0.1V and the DFE mode is set to Fixed. Press the run button to launch the simulation.

As the simulation runs, the Time Domain eye diagram gets constantly updated:

After the simulation is complete, the Init Statistical and Time Domain Analysis Results plot becomes available:

Note that since clock-forwarding only affects the Time Domain results, the Statistical results does not reflect the effects of clock-forwarding.

How to visualize results

To verify proper operation of clock-forwarding, plotting the resulting waveforms and/or clock-ticks can be very helpful. Several signals have data logging turned on to enable the use of the Data Inspector for plotting waveforms. To turn on additional data logging, right-click on any signal and select Log Selected Signals.

Plotting clock and data waveforms

After running a simulation open the Data Inspector by clicking on the -icon in the Simulink Simulation tab. In the Data Inspector check the boxes for Stimulus:1 (the incoming stimulus waveform, Red in the figure below) and for rxOut (the Rx data out waveform, blue in the figure below). You should see that rising and falling edges of the external-clock waveform (Red) correspond with the peaks of the data waveform (Blue). If they do not line up as expected, the offset can be adjusted by using the clock offset (see Setting the clock offset).

Plotting clock-ticks in and out

After running a simulation, in the Data Inspector check the boxes for Forward Clock Times:1 (the external clock-times from the Clock Times Generator block) and clockTime (the clock-times being passed out of the Rx model). When “Times” is selected as the external clock times, these two signals are expected to be identical.

Changing the data pattern

The Rx Data pattern is set using the Stimulus block of the SerDes system as usual. A PRBS pattern can be selected, or a named stimulus pattern that lives in the model workspace can be used. The current stimulus pattern is named SILinkStimulus_dq.

Changing the clock pattern

Two clock patterns are included in this Simulink model:

SILinkStimulus_ck: This is a periodic clock pattern generated by Parallel Link Designer (in Signal Integrity Toolbox)
SILinkStimulus_dqs: This is a DQS pattern with an 8-bit DDR burst followed by a 4-bit static low.

To change this pattern, specify the desired pattern by name in the Strobe Clock Times Generator mask.

To create a new pattern, see Creating a new clock waveform.

Switching between an external waveform and clock ticks

Switching between using an external waveform to generate clock times to using an external clock ticks array directly is accomplished by changing the value of the parameter Rx_Use_Clock_Input from the Strobe Clock Times Generator mask. There are 3 options for External Clock Input:

None: The Rx AMI model uses it's built-in CDR to generate clock times.
Times: Use the external clock times given in the Model Workspace parameter clockTicks.
Wave: Use the external clock waveform from the Waveform Name in the mask.

Creating a new clock waveform

Generating a new clock or strobe waveform for use in the Stimulus block inside the Strobe Clock Times Generator is accomplished using Parallel Link Designer (part of Signal Integrity Toolbox) and Signal Integrity Link. Note that since you are only interested in creating a stimulus pattern, any AMI model can be used for this process. The following steps assume you are using the dq_clock_forward model from this example, however the dqs_clock_forward model can be used as well.

Here is an overview of the required steps. For additional information on using Signal Integrity Link, see Signal Integrity Link. Note that if you have previously run Signal Integrity Link on this Simulink model you can begin with step 3.

Start by using the SerDes IBIS-AMI Manager to export the Tx and Rx models. Make sure that the IBIS file, AMI files and DLL files boxes are checked.
Use Signal Integrity Link to Create a new Parallel Link Designer project.
In the new Parallel Link Designer project, double-click on the Tx designator then press the IO Stimulus button in the Designator Element Properties dialog.
In the Stimuli dialog, press the New button to open the Stimulus Editor and create the desired clock pattern. For example, you can set a continuous-clock pattern that repeats, or a burst-strobe pattern that starts and stops.
When you are done creating a new stimulus, make sure the new named stimulus pattern is selected in Designator Element Properties.
Use the Simulation Parameters dialog to set the desired Samples Per Bit, Record Start and Record Bits values to capture the desired number of samples. For example, to record 32,000 samples, set Samples Per Bit to 32, Record Start to 0UI, and Record Bits to 10,000UI, making sure that Time Domain Stop is >= 10,000UI. Note: Number of samples = Samples Per Bit * Record Bits.
Run the Parallel Link Designer simulation to generate the new Stimulus pattern.
In Signal Integrity Link, in the Import parallel link project section, select the proper simulation. The Stimulus pattern box is must be checked. Then click the Import parallel link project button.
Back in Simulink, the new stimulus pattern will automatically be set in the top-level Stimulus block. Change this pattern back to either PRBS or SILinkStimulus_dq as was previously set.
In the Stimulus block inside the Strobe Clock Times Generator, select the newly created stimulus SILinkStimulus.

Note: The SILinkStimulus pattern is over-written each time this process is performed. To save a named stimulus pattern, open the Model Explorer, browse to the Model Workspace and rename SILinkStimulus to a new name. This re-named parameter is saved along with the rest of the Simulink model.

Creating new clock ticks

Generating new clock ticks for use inside the Strobe Clock Times Generator is accomplished using Parallel Link Designer (part of Signal Integrity Toolbox) and Signal Integrity Link. Unlike with the new clock waveform process above, here it is recommended to use the actual Clock or Strobe AMI model. The following steps assume you are using the dqs_clock_forward model included with this example. For more information on the Clock/Strobe model see Strobe Rx IBIS-AMI Model Requirements.

Here is an overview of the required steps. Note that if you have previously run Signal Integrity Link on the dqs_clock_forward Simulink model you can begin with step 3.

Start by using the SerDes IBIS-AMI Manager to export the Tx and Rx models. Make sure that the IBIS file, AMI files and DLL files boxes are checked.
Use Signal Integrity Link to Create a new Parallel Link Designer project.
In the new Parallel Link Designer project open the Simulation Parameters dialog and set the parameter Output Clock Ticks to Yes.
<Optional>: While you can run the simulation using the default setup from Signal Integrity Link, it is recommended that you set up a widebus simulation with a realistic topology that includes both the dq_clock_forward and the dqs_clock_forward models.
Run the desired Parallel Link Designer simulation.
From the MATLAB command line, type the following to import the clock times out of your Parallel Link Designer project and format them for use in Simulink. Note: Make sure to point the Clock/Strobe designator name and not the Data designator name.

%% Read the Parallel Link Designer generated clock_ticks from a file
filename = '<path_to_pld_project>/<project_name>/interfaces/<interface_name>/pre_sims/<sheet_name>/default.ssm/qcd/<designator>_ttte.td.<designator>_z.clock_ticks.csv';
csv = readmatrix(filename,'Range','A7');

%% Format input
count = csv(:,1);
clock = csv(:,2);

%% Output clock_ticks for Simulink
clockTicks = [count, clock];

Note: If you wish to save multiple clockTicks arrays, or switch between arrays, you need to update the clockTicks parameter name in the clockTimesGen MATLAB function block inside the Strobe Clock Times Generator sub-system.

Setting the clock offset

The Input AMI parameter ForwardClockOffset has been added to the DFEandCDR block. This parameter is of type Integer, with a Default of 0 and a Range of 0 to 512. In the DFEandCDR block, this parameter controls a Delay block which is used to delay the incoming clock times by up to 512 samples. Using the SerDes IBIS-AMI Manager you can use this delay to adjust the location of the external clock with respect to the data waveform as desired.

For example, here is the time domain eye diagram with Select External Clock Input set to Wave and ForwardClockOffset set to 5:

Note how the DFE taps are being applied in the center of the eye instead of at the edges of the eye. With the ForwardClockOffset delay set to 14, the DFE taps are being applied at the ideal location at the edge of the eye:

Note: Delay values less that 0 will have no effect on the resulting waveform.

Changing the current value of Rx_Use_Clock_Input

The operation of the clock forwarding is controlled by the reserved AMI parameter Rx_Use_Clock_Input. Changing the current value of this parameter is not supported by the SerDes IBIS-AMI Manager, so all updates to the current value are done from the Strobe Clock Times Generator mask using the Select External Clock Input radio buttons.

Note: If the IBIS-AMI Manager is already open, you may need to close and re-open for the changes to be visible.

Generate Rx IBIS-AMI Model

The final part of this example takes the customized Simulink model and generates IBIS-AMI compliant model executables, IBIS and AMI files for the clock forwarding receiver.

Open the Block Parameter dialog box for the Configuration block and click on the Open SerDes IBIS-AMI Manager button.

Required Keywords

The IBIS-AMI Reserved input parameter Rx_Use_Clock_Input is required for codegen to work properly. If this parameter is not present in your model, while the model may codegen the clock-forwarding properties will not be enabled.

Export Models

On the Export tab in the SerDes IBIS/AMI manager dialog box.

Update the Rx model name to clock_forward_dq_rx.
Note that the Tx and Rx corner percentage is set to 10. This will scale the min/max analog model corner values by +/-10%.
Verify that Dual model is selected for the Rx AMI Model Settings. This will create a model executable that support both statistical (Init) and time domain (GetWave) analysis.
Set the Rx model Bits to ignore value to 10 to allow enough time for the external clock waveform to settle during time domain simulations.
Set Models to export to Rx only since we are only generating a Rx model.
Set the IBIS file name to be clock_forwarding.ibs
Press the Export button to generate models in the Target directory.

Review AMI file

The resulting Rx AMI file will look like a normal Rx AMI file with two exceptions. First, the AMI_Version is set to 7.1, while the second is the inclusion of the reserved parameter Rx_Use_Clock_Input.

Model Limitations

This clock forwarding AMI model requires an EDA tool that supports the new IBIS 7.1 reserved parameter Rx_Use_Clock_Input.

Per the IBIS 7.1 specification, it is intended that Data and Strobe AMI models will be delivered as a matched pair. This may place additional requirements on the Strobe AMI model which are discussed in the next section.

Strobe Rx IBIS-AMI Model Requirements

Per the IBIS 7.1 specification, it is intended that Data and Strobe AMI models will be delivered as a matched pair. This means that a Strobe (or Clock) AMI model will also need to be generated for use along with this Data AMI model. The Strobe model should not use a CDR to generate clock times, but instead should only output clock times at the zero-crossings of the output waveform, which can be handled by using a MATLAB Function Block. Additional features for the Strobe AMI model include the handling of strobe pre-amble (only output clock times after the end of the pre-amble) and handling of Single-Data-Rate (SDR) signals such as a Clock that only outputs clock times on the rising edge of the output waveform.

An example Strobe/Clock AMI model is attached to this example and can be opened by typing the following command:

>> open_system('dqs_clock_forward.slx')

This model contains a pass-through differential Tx and Rx. The Rx AMI model outputs clock times only at zero-crossings and contains two controls:

DQS_Preamble: The number of DQS transitions to skip before outputting clock times during a DQS burst. Currently requires at least 4 DQS UI between bursts. (1tCK = 2 DQS UI). The Default value is "2tCK". When using this Rx as a Clock receiver, this value should be set to "0tCK".
Strobe_or_Clock: Switch between a Strobe or Clock signal. A Strobe signal returns clock times every edge (DDR) while a Clock signal only returns clock times on rising edges (SDR). The Default is "Strobe".

Test Generated IBIS-AMI Models

The clock forwarding receiver IBIS-AMI model is now complete and ready to be tested in any industry standard AMI model simulator that supports IBIS 7.1.