Generate HDL and HLS Code from Transmit and Receive FIFO Algorithms
R2026bThis example shows how to generate HDL and HLS code from MATLAB® functions that implement transmit and receive first-in, first-out (FIFO) buffers using circular buffer data structures.
FIFO buffers are fundamental building blocks in digital communication systems. They decouple the timing between data producers and consumers, allowing components that operate at different rates or with different latencies to exchange data reliably. This example includes two hardware-ready designs:
mlhdlc_rx_fifo– a receive FIFO that stores incoming bytes and provides them on demandmlhdlc_tx_fifo– a transmit FIFO that accepts bytes for outgoing transmission and acknowledges each store operation
Both use a 1024-element circular buffer with persistent head and tail pointers, and track full and empty status.
Examine the MATLAB Design and Test Bench
Set up the MATLAB function and test bench for the receive FIFO. In the MATLAB Command Window, enter:
mlhdlc_demo_setup("mlhdlc_rx_fifo");MATLAB function
Test bench
<model>_runme.mscript, which includes the commands to generate HDL code<model>_runme_hls.mscript, which includes the commands to generate HLS code
The MATLAB function, mlhdlc_rx_fifo, implements a circular buffer
that stores integers. It accepts control signals for getting a byte, storing a byte,
providing byte input, resetting the FIFO, and enabling operations. It returns the output
byte, empty and full status flags, a byte-ready handshake signal, and the number of bytes
available in the buffer.
To view the function, enter:
open mlhdlc_rx_fifo.m;The test bench file, mlhdlc_rx_fifo_tb, verifies the behavior of
the MATLAB function by filling the buffer to capacity and then reading all stored values
back. To view the test bench,
enter:
open mlhdlc_rx_fifo_tb.m;To set up the transmit FIFO example, enter:
mlhdlc_demo_setup("mlhdlc_tx_fifo");mlhdlc_tx_fifo, uses the same circular buffer structure
but implements handshaking on the store side, acknowledging each byte received from an
external producer.Simulate the Design
To check for run-time errors, simulate the design by running the test bench. In the MATLAB Command Window, enter:
mlhdlc_rx_fifo_tb;
To simulate the transmit FIFO, enter:
mlhdlc_tx_fifo_tb;
Generate HDL Code
The mlhdlc_rx_fifo_runme script specifies the target files,
enables the settings required for this example, and generates HDL code.
The script specifies the MATLAB function and test bench, then creates a fixed-point
configuration object and an HDL configuration object by using the
coder.config function. It associates the test bench with both
configuration
objects.
designName = "mlhdlc_rx_fifo"; designTB = "mlhdlc_rx_fifo_tb"; fixptCfg = coder.config("fixpt"); fixptCfg.TestBenchName = designTB; cfg = coder.config("hdl"); cfg.TestBenchName = designTB;
The script then generates code:
codegen("-float2fixed", "fixptCfg", "-config", "cfg", designName, "-launchreport");
Run the Script
First, modify the mlhdlc_rx_fifo_runme script. Synthesis is
disabled by default. Change the value for the SynthesizeGeneratedCode
property:
cfg.SynthesizeGeneratedCode = true;
Update the settings for your synthesis tool:
cfg.SynthesisTool = "Xilinx Vivado"; cfg.SynthesisToolChipFamily = "Artix7"; cfg.SynthesisToolDeviceName = "xa7a100t"; cfg.SynthesisToolPackageName = "csg324"; cfg.SynthesisToolSpeedValue = "-1I";
Then, generate code by running the script:
mlhdlc_rx_fifo_runme
After code generation completes, the report opens. Examine the generated HDL code in the report.
To generate HDL code for the transmit FIFO, run the
mlhdlc_tx_fifo_runme script in the transmit FIFO working
folder.
Generate HLS Code
The mlhdlc_rx_fifo_runme_hls script specifies the target
files, enables the settings required for this example, and generates HLS code.
The script specifies the MATLAB function and test bench, then creates a fixed-point
configuration object and an HLS configuration object by using the
coder.config function. It associates the test bench with both
configuration
objects.
designName = "mlhdlc_rx_fifo"; designTB = "mlhdlc_rx_fifo_tb"; fixptCfg = coder.config("fixpt"); fixptCfg.TestBenchName = designTB;
The script creates an HLS configuration object by using the
coder.config function, associates the test bench, and enables
simulation.
cfg = coder.config("hls");
cfg.TestBenchName = designTB;
cfg.SimulateGeneratedCode = true;The script then generates code:
codegen("-float2fixed", "fixptCfg", "-config", "cfg", designName, "-launchreport");
Run the Script
First, modify the mlhdlc_rx_fifo_runme_hls script. Synthesis is
disabled by default. Change the value for the SynthesizeGeneratedCode
property:
cfg.SynthesizeGeneratedCode = true;
Depending on your synthesis tool, set one of these flags to
true:
isCodingForStratusHLS = false; isCodingForVitisHLS = true;
Depending on your synthesis tool, update these synthesis tool settings:
if isCodingForStratusHLS cfg.SynthesisTool = "Cadence Stratus HLS"; elseif isCodingForVitisHLS cfg.SynthesisTool = "Xilinx Vitis HLS"; cfg.SynthesisToolChipFamily = "Artix7"; cfg.SynthesisToolDeviceName = "xa7a100t"; cfg.SynthesisToolPackageName = "csg324"; cfg.SynthesisToolSpeedValue = "-1I"; end
Then, generate code by running the script:
mlhdlc_rx_fifo_runme_hls
After code generation completes, the report opens. Examine the generated HLS code in the report.
To generate HLS code for the transmit FIFO, run the
mlhdlc_tx_fifo_runme_hls script in the transmit FIFO working
folder.