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Clock enable output port

Name for the generated clock enable output port

Model Configuration Pane: Global Settings / Ports


Specify the name for the generated clock enable output port as a character vector.


ce_out (default) | character vector

Default: ce_out

A clock enable output is generated when the design requires one.


To set this property, use the functions hdlset_param or makehdl. To view the property value, use the function hdlget_param.

Recommended Settings

No recommended settings.

Programmatic Use

Parameter: ClockEnableOutputPort
Type: character vector
Default: 'ce_out'

Version History

Introduced in R2012a

See Also

Model Settings