Polyphase Channelizer and Multi-tile Synchronization

Learn about how to use polyphase channelizer and multi-tile synchronization

Process incoming analog-to-digital converter (ADC) samples and produce a spectrum that has 512 MHz of bandwidth by using the HDL Optimized Channelizer block. The channelizer data sent back is in limited bursts, which are triggered by an AXI4 register in a capture loop. Drive a tone commanded at some frequency over AXI4 by using a numerically-controlled oscillator (NCO).

Enforce the time alignment for samples of multiple channels across different ADC and digital-to-analog converter (DAC) tiles on an RFSoC device. Channels in a tile alone are aligned in time but alignment with another channel from a different tile does not exist. Resolve this issue by enabling multi-tile synchronization (MTS). Measure the latency across different tiles and then apply sample delays to align the samples.

Topics

Host Interface Script Data Capture from Polyphase Channelizer Algorithm
Capture ADC data to external DDR memory and display the resulting spectrum plot using FPGA API functions over a TCP/IP connection.
Multi-Tile Synchronization Configuration
Use multi-tile synchronization (MTS) to resolve the time alignment issue of multiple channels across different tiles on an RFSoC device.