Tests for Code Coverage Analysis
Code coverage analysis in Simulink® Design Verifier™ involves evaluating how thoroughly the generated code from a Simulink model is tested. This analysis checks if the code behaves as expected and meets quality standards. Code coverage analysis helps identify parts of the code that have not been executed during testing, which can point to potential weaknesses or untested scenarios.
By performing code coverage analysis, you can:
Identify untested parts of the code.
Improve test cases to achieve higher coverage.
Check compliance with industry standards, such as DO-178C, which often require specific levels of code coverage.
Simulink Design Verifier integrates these analyses into the model-based design workflow, facilitating the testing and validation of both the model and the generated code. This integration helps maintain consistency between the model's behavior and the implemented code, ensuring that the transition from model to code does not introduce errors.
Topics
- Code Coverage Test Generation
This example shows how to use Simulink® Design Verifier™ to generate test cases to obtain complete code coverage.
- Generate Test Cases for Embedded Coder Generated Code
Outlines a process for generating test cases for generated code.
- Verify a Component for Code Generation
This example uses the
slvnvdemo_powerwindowmodel to show how to verify a component in the context of the model that contains that component. - Analyze Code and Perform Software-in-the-Loop Testing
Detect code errors, generate code metrics, test code and model equivalence, test code against requirements.
- Simulink Design Verifier Limitations and Considerations for S-Functions and C/C++ Code
Lists limitations and considerations of S-functions and Generated Code in Simulink Design Verifier.
