FMA
Single instruction, multiple data (SIMD) code for fused multiply add operations
Since R2024a
Model Configuration Pane: Code Generation / Optimization
Description
The FMA parameter instructs the code generator to generate single instruction, multiple data (SIMD) code for fused multiply add operations.
Dependencies
To use this parameter, you must set:
Device vendor to
ARM Compatibleand Device type toARM Cortex-A (32-bit)orARM Cortex-A (64-bit).Leverage target hardware instruction set extensions to a valid instruction set.
Settings
off (default) | on- On
Generates single instruction, multiple data (SIMD) code for fused multiply add operations.
- Off
Generates non-parallel
forloops for fused multiply add operations.
Recommended Settings
| Application | Setting |
|---|---|
| Debugging | No impact |
| Traceability | No impact |
| Efficiency | No impact |
| Safety precaution | No impact |
Programmatic Use
Parameter:
InstructionSetFMA |
| Type: character vector |
Value:
'on' | 'off' |
Default:
'off' |
Version History
Introduced in R2024a
See Also
Leverage target hardware instruction set extensions
Topics
- Generate SIMD Code from Simulink Blocks for ARM Platforms (Embedded Coder)