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Loop Streaming to Reduce Area

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This example shows how to use the design-level loop streaming optimization in HDL Coder™ to optimize area.

Introduction

A MATLAB® for loop generates a FOR_GENERATE loop in VHDL. Such loops are always spatially unrolled for execution in hardware. In other words, the body of the software loop is replicated as many times in hardware as the number of loop iterations. This results in inefficient area usage.

The loop streaming optimization creates an alternative implementation of a software loop, where the body of the loop is shared in hardware. Instead of spatially replicating copies of the loop body, HDL Coder™ creates a single hardware instance of the loop body that is time-multiplexed across loop iterations.

MATLAB Design

The MATLAB code used in this example implements a simple FIR filter. This example also shows a MATLAB testbench that exercises the filter.

design_name = 'mlhdlc_fir';
testbench_name = 'mlhdlc_fir_tb';

  1. Design: mlhdlc_fir

  2. Test Bench: mlhdlc_fir_tb

Simulate the Design

Simulate the design with the testbench prior to code generation to make sure there are no runtime errors.

mlhdlc_fir_tb

Creating a New Project From the Command Line

To create a new project, enter the following command:

coder -hdlcoder -new fir_project

Next, add the file mlhdlc_fir.m to the project as the MATLAB Function and mlhdlc_fir_tb.m as the MATLAB Test Bench.

Launch the Workflow Advisor.

Refer to Get Started with MATLAB to HDL Workflow for a more complete tutorial on creating and populating MATLAB HDL Coder projects.

Turn On Loop Streaming

The loop streaming optimization in HDL Coder converts software loops (either written explicitly using a for-loop statement, or inferred loops from matrix/vector operators) to area-friendly hardware loops.

Run Fixed-Point Conversion and HDL Code Generation

Right-click the Code Generation step. Choose the option Run to selected task to run all the steps from the beginning through HDL code generation.

Examine the Generated Code

When you synthesize the design with the loop streaming optimization, you see a reduction in area resources in the resource report. Try generating HDL code with and without the optimization.

The resource report without the loop streaming optimization:

The resource report with the loop streaming optimization enabled:

Limitations

Loops will be streamed only if they are regular nested loops. A regular nested loop structure is defined as one where:

  • Total number of iterations of the loop structure is non-zero.

  • There are no back-to-back loops at the same level of the nesting hierarchy.