This is a validation of an Autopilot model with Voter Logic and Mode Transition using Simulink Design Verifier. The requirements are given as tables. An equivalent Sfunction blocks are created which represents the Voter Logic and Mode Transition Logic. Both Voter Logic and Mode Transition Logic are validated using assertion in the SDV.
인용 양식
Ravi (2024). Exploring Simulink Design Verifier for Sfunctions (https://www.mathworks.com/matlabcentral/fileexchange/70045-exploring-simulink-design-verifier-for-sfunctions), MATLAB Central File Exchange. 검색됨 .
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개발 환경:
R2017a
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- Verification, Validation, and Test > Simulink Design Verifier > Generate Tests > Functional Requirements Testing >
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버전 | 게시됨 | 릴리스 정보 | |
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1.0.0 |