How can I pass a bus signal to the Control Law Accelerator (CLA) subsystem using the CpuToCla1MsgRAM storage class?
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MathWorks Support Team
2020년 11월 24일
편집: MathWorks Support Team
2025년 2월 7일
In my model, I use many virtual buses to improve the visual clarity of my model. I need to pass one of these buses into the subsystem used for the Control Law Accelerator subsystem for my TI C2000 board.
I am following the examples mentioned in the following documentation page which can be accessed by running the following command in the command window of MATLAB R2020a:
>> web(fullfile(docroot, 'supportpkg/texasinstrumentsc2000/ug/using-the-control-law-accelerator-cla.html'))
However, if I try to pass the bus in and assign it the tic2000demospkg.Signal with storage class CpuToCla1MsgRAM, it errors out with:
The Simulink signal object specified on the line originating from 'Output Port1' of CLA_virtual_bus/c;a_subsystem/In2 is invalid because it cannot be uniquely mapped to a valid signal in the model. Consider inserting a Signal Conversion block after the output port and specifying the signal object on the output of the Signal Conversion block instead.
How can I use a bus with the CLA subsystem?
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MathWorks Support Team
2025년 2월 6일
편집: MathWorks Support Team
2025년 2월 7일
In short, it will not be possible to use a virtual bus to bundle the signals together when passing them to the CLA subsystem. A virtual bus is purely a visual representation and still behaves as unique signals in the generated code. For this reason, trying to apply a single Simulink.Signal/tic2000demospkg.Signal with a specific storage class to a virtual bus will result in an error.
It is possible to use a nonvirtual bus, as this treats all of the bundled signals as one continuous section of memory as a structure. However, be aware that this changes the actual behavior as a nonvirtual bus will be represented as a struct in generated code.
If you need to still use virtual buses everywhere else in the model, it may be easiest to add a signal conversion block immediately before passing the bus into the subsystem and specify the conversion to output a non-virtual bus. There is an attached example that illustrates this.
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