How does it work the AXI4 Stream IIO driver?

조회 수: 2 (최근 30일)
Andrea Foradori
Andrea Foradori 2019년 3월 4일
답변: Kiran Kintali 2021년 5월 24일
Dear all,
I have a question regarding the AXI4 Stream IIO Read/Write driver.
Can the driver handle the Writing and Reading at the same time?
I have a Simulink model which makes use of the following interfaces:
  • AXI4 Stream Slave (input)
  • AXI4 Stream Master (output)
  • 2 x AXI4 MM Master (write/read the DDR memory)
I am using the Avnet Zedboard with a Custom Reference design.
My model receives the data in (AXI4 Stream Slave) and it writes them to the External DDR with AXI4 MM Master. Then it reads the same data from the External memory with AXI4 MM Master in a different order. The model reads and writes the data from/to the External memory in order to have a ping-pong buffer in DDR, which should allow to speed-up the performance.
This means that from the "Simulink Model" point of view , the read and write phase can happened at the same time. The arbitration to access the DDR is performed by the AXI inteconnect and the DDR controller.
Using Xilinx ILAs, I have monitored the AXI-MM transactions and some of the VHDL signals which belong to the Simulink model.
Expected behaviour:
  • step 1: write 1st frame
  • step 2: write 2nd frame / read 1st frame
  • step 3: write 3nd frame / read 2st frame
  • ...
Test on Zedboard:
  • step 1: write 1st frame
  • step 2.1: read 1st frame
  • step 2.2: write 2nd frame
  • step 3.1: read 2nd frame
  • step 3.2: write 3rd frame
  • ...
The read and write operations are happening sequentially. This because the "AXI Stream IIO Write" wait to send the new frame as long as the previous frame has been completely read from DDR and stream out with the "AXI Stream IIO Read".
Can please someone explain me why?
PS: I have already tried to set the priority of the AXI Stream IIO Read and Write to the same value, but nothing is changing.

답변 (1개)

Kiran Kintali
Kiran Kintali 2021년 5월 24일
web(fullfile(docroot, 'hdlcoder/ug/getting-started-with-axi4-stream-interface-in-zynq-workflow.html?s_tid=doc_srchtitle'))
web(fullfile(docroot, 'hdlcoder/ug/running-audio-filter-with-multiple-axi4-stream-channels.html?s_tid=doc_srchtitle'))
web(fullfile(docroot, 'hdlcoder/ref/addaxi4streaminterface.html?s_tid=doc_srchtitle'))

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