Modeling S-R Flip flip for HDL code generation

조회 수: 14(최근 30일)
Shvetal Patel
Shvetal Patel 2022년 6월 2일
답변: Kiran Kintali 2022년 6월 4일
For the functional model I used S-R flip flop in simulink library. I realized that the model is incompatible with HDL code generation. The HDL work flow section 2.3 flags error message: incompatible with :..Combinatorial Logic' is not supported for HDL code generation. To continue with code generation, comment out this block..."
The error is specific to the combinatorial logic block used in the S-R flip flop model available in the simulink library.
Please point me to an appropriate answer record which implements HDL compatible S-R flip flop model.
Thank You
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Bharath Venkataraman
Bharath Venkataraman 2022년 6월 3일
Do you require the S-R flip flop or will the delay block that simulates the behavior of a register meet your needs?

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Kiran Kintali
Kiran Kintali 2022년 6월 4일
Attached in an example model that works in 22a release.

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