converting fixed point simulink model to zynq 706

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Hassan Khan
Hassan Khan 2021년 9월 1일
답변: Kiran Kintali 2022년 10월 7일
i am using ZYNQ706 and FMCOMMS3 in this project. Generating HDL code through HDL advisor. but when i run the hdl advisor, it gives me an error saying : 'Interface Baseband RX1[15:0] does not support vector data type on port'. I dont know how to solve this problem.
Any kind of help will be appreciated
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Martin Enderwitz
Martin Enderwitz 2021년 9월 2일
Hi Hassan,
From the error message, it sounds like your model is providing vector-based data to the data ports on the DUT you wish to generate HDL code for.
Are you following the IP Core Generation workflow in Communications Toolbox™ Support Package for Xilinx® Zynq®-Based Radio? If so, then the data inputs to the DUT must be scalar, i.e. sample-based rather than frame-based.

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Kiran Kintali
Kiran Kintali 2022년 10월 7일

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