converting fixed point simulink model to zynq 706

Hi,

i am using ZYNQ706 and FMCOMMS3 in this project. Generating HDL code through HDL advisor. but when i run the hdl advisor, it gives me an error saying : 'Interface Baseband RX1[15:0] does not support vector data type on port'. I dont know how to solve this problem.

Any kind of help will be appreciated

THANKS

[Martin Enderwitz]

Hi Hassan,

From the error message, it sounds like your model is providing vector-based data to the data ports on the DUT you wish to generate HDL code for.

Are you following the IP Core Generation workflow in Communications Toolbox™ Support Package for Xilinx® Zynq®-Based Radio? If so, then the data inputs to the DUT must be scalar, i.e. sample-based rather than frame-based.

Answer 1

[Kiran Kintali]

https://www.mathworks.com/help/supportpkg/xilinxzynqbasedradio/ug/fpga-targeting-workflow.html

Communications Toolbox Support Package for Xilinx Zynq-Based Radio

https://www.mathworks.com/help/supportpkg/xilinxzynqbasedradio/index.html?s_tid=CRUX_lftnav

Feel free to reach out to support for additional help.