This example shows how to design a 5G NR master information block (MIB) recovery model that is optimized for HDL code generation and hardware implementation and that supports frequency range 1 (FR1) and frequency range 2 (FR2).
5G cell towers can operate in either FR1 or FR2 frequency bands. FR1 covers frequencies up to 6 GHz, and FR2 covers frequencies above 6 GHz, including the millimeter wave band. This example introduces functionality that is required to support FR2 and the process of upgrading an existing FR1 design.
The Simulink® models described in this example are fixed-point HDL-optimized implementations of MIB recovery for 5G NR FR1 and FR2. This example is one of a related set that shows the workflow for designing and deploying a 5G NR cell search and MIB recovery algorithm to hardware. This figure shows the complete workflow.
Each step in this workflow is demonstrated by one or more related examples.
The MATLAB Golden Reference Algorithm step consists of the NR Cell Search and MIB and SIB1 Recovery (5G Toolbox) example, which shows the floating-point golden reference algorithm.
The MATLAB Hardware Reference Algorithm step consists of the NR HDL Downlink Receiver MATLAB Reference example, which models hardware-friendly algorithms and generates test waveforms. This MATLAB® code operates on vectors and matrices of floating-point data samples and does not support HDL code generation.
The Simulink Fixed-Point Implementation Model step consists of multiple examples. The NR HDL Cell Search example demonstrates a 5G cell search Simulink subsystem that uses the same algorithm as the MATLAB reference. The NR HDL MIB Recovery example adds a broadcast channel decoding and MIB recovery subsystem. The NR HDL SIB1 Recovery example adds a subsystem that recovers the SIB1 resource grid, and shows how to decode its output using MATLAB reference code. The NR HDL MIB Recovery for FR2 example (this example) shows cell search and MIB recovery models that are extended to support FR2. These models operate on fixed-point data and are optimized for HDL code generation.
The Simulink SoC Deployment Model step consists of the Deploy NR HDL Reference Applications on SoCs examples, which build on the fixed-point implementation models and use hardware support packages to deploy the algorithms on hardware.
For a general description of how you can use MATLAB and Simulink together to develop deployable models, see Wireless Communications Design for FPGAs and ASICs.
This example uses these files.
nrhdlMIBRecovery.slx: This Simulink model combines the processing of the SSB detector and the SSB decoder into an integrated model that shows the complete MIB recovery process. This model uses the
nrhdlSSBDecodingCore.slx model references.
nrhdlSSBDecodingCore.slx: This model reference implements the SSB decoding algorithm.
nrhdlSSBDetectionCore.slx: This model reference implements the SSB detection algorithm.
Simulink Data Dictionary
nrhdlReceiverData.sldd: This Simulink data dictionary contains bus objects that define the buses contained in the example models.
runMIBRecoveryModelFR2.m: This script runs and verifies the
nrhdlMIBRecovery model with an FR2 waveform.
nrhdlexamples: This package contains the MATLAB reference code and utility functions for verifying the implementation models.
This section describes the changes to SSB detection in the NR HDL Cell Search example that are required to support FR2. It details the algorithmic requirements across the MATLAB reference and Simulink implementation, and describes the optimizations made for HDL code generation.
The SSB detection algorithm performs search and demodulation with a given subcarrier spacing (SCS). The SCS options are 15 kHz or 30 kHz for FR1 and 120 kHz or 240 kHz for FR2. To add FR2 functionality, the new SCS options must be supported. The detector searches for SSBs by downsampling the received signal to one of the rates shown in the table according to the SCS. The signal is then cross-correlated with the PSS sequences.
SCS (kHz) Sample Rate (MHz) _________ _________________ 15 3.84 30 7.68 120 30.72 240 61.44
To accommodate the increased bandwidth of the SSBs in FR2, an input sampling rate of 122.88 Msps is used (compared to 61.44 Msps for the FR1 design). The timing reference units are unchanged and still measured in samples at 61.44 Msps. The timing reference counters increment in steps of 16, 8, 2, and 1 for SCS of 15, 30, 120, and 240 kHz, respectively. This model includes a modified DDC design that supports these additional subcarrier spacings and their corresponding sample rates. The DDC corrects frequency offsets and then downsamples the data to 61.44 MHz. The output from the DDC is the input to the SCS selection subsystem. This subsystem creates the data streams for each SCS option by successively downsampling the data with halfband filters. All four streams are aligned, enabling the timing reference to be maintained when switching between different subcarrier spacings. The selected stream is correlated against each of the three PSS sequences to detect SSBs.
The FPGA implementation of these correlators in the time domain uses 576 DSPs, which is four times more than the version that supports only FR1. This change in resources is because the sampling rates reduce the amount of resource sharing that can be achieved in the filters. A frequency domain overlap-add method is used to minimize the DSP usage at the expense of an increase in latency. This figure shows the overlap-add correlation in the
nrhdlSSBDetectionCore model. The subsystem computes the four stages of the overlap-add method: FFT, multiplication by the three sets of frequency domain coefficients (one for each PSS), IFFT, and overlap and add of subsequent windows. This implementation uses one FFT, three complex multipiers, and three IFFTs, requiring 48 DSP blocks in total.
This section describes the updates required to add FR2 support to the SSB decoding algorithm. For a complete description of the FR1 model, see the NR HDL MIB Recovery example. The example details the algorithmic requirements across the MATLAB reference and Simulink implementation.
The SSB decoding algorithm decodes the broadcast channel (BCH) contained in the SSB. The decoding process outputs the MIB and the beam index of the detected SSB. In FR1, the maximum number of SSBs that can be independently beamformed is 8. FR2 supports transmitting 64 SSBs, each on their own beam. The contents of the BCH vary between FR1 and FR2 to accommodate the different maximum beam counts.
nrhdlexamples.ssbDecode function and
nrhdlSSBDecodingCore model accept
Lmax as an input.
Lmax is the maximum number of beams that can be transmitted by a cell tower, and its value depends on the carrier frequency. Valid settings for
Lmax are 4 or 8 for FR1 and 64 for FR2.
Lmax affects the descrambling in the BCH processing subsystem and how the final BCH payload is parsed.
runMIBRecoveryModelFR2 script to run an FR2 MIB recovery simulation and to verify the results. The script displays its progress in the MATLAB Command Window. The simulation uses the
nrhdlMIBRecovery model, which references the
nrhdlSSBDecodingCore models. The input stimulus for the simulation is an FR2 waveform containing an SS burst with these settings.
The SSB pattern is case D.
The subcarrier spacing is 120 kHz.
NCellID is 249.
The active SSBs are transmitted on SSB indices 24:31.
This script generates a plot that shows the resource grid of the burst waveform. The color of each resource element indicates its amplitude. The plot shows the eight transmitted SSBs. The SSBs are generated with different power levels to model what a UE typically receives.
The simulation searches for SSBs in the waveform by using the MATLAB reference. This table shows the SSBs detected during the search and their parameters. The SSB with the strongest PSS correlation is selected for demodulation and decoding to test the
nrhdlMIBRecovery model. The subcarrier spacing, PSS sequence, timing offset, and frequency offset estimate are passed into the model to specify which SSB to demodulate and decode. The table shows the final results of the decoding process. It includes the simulation and MATLAB reference results for comparison.
Searching for SSBs using the MATLAB reference. SSBs found by MATLAB reference: NCellID2 timingOffset pssCorrelation pssEnergy frequencyOffset ________ ____________ ______________ _________ _______________ 0 1.0918e+05 0.42856 0.9903 51134 0 1.1137e+05 0.76446 1.6985 49836 0 1.1576e+05 0.27392 0.66928 48771 0 1.1795e+05 4.138 7.8159 49815 0 1.2456e+05 0.58574 1.249 51829 0 1.2675e+05 1.2834 2.7073 49390 0 1.3113e+05 0.18099 0.49988 48119 0 1.3332e+05 0.59469 1.2165 47641 Demodulating the strongest SSBs using the MATLAB reference. Decoding the SSB using the MATLAB reference. Successfully decoded SSB with MATLAB reference Demodulating the strongest SSBs using Simulink model. Running nrhdlMIBRecovery.slx ### Starting serial model reference simulation build ### Model reference simulation target for nrhdlSSBDecodingCore is up to date. ### Model reference simulation target for nrhdlSSBDetectionCore is up to date. Build Summary 0 of 2 models built (2 models already up to date) Build duration: 0h 0m 7.1689s .............. Successfully decoded SSB with Simulink model MATLAB decoded information pbchPayload: 218103955 ssbIndex: 27 hrf: 0 err: 0 mib: [1×1 struct] Simulink decoded information pbchPayload: 218103955 ssbIndex: 27 hrf: 0 err: 0 mib: [1×1 struct] MATLAB decoded MIB parameters NFrame: 105 SubcarrierSpacingCommon: 120 k_SSB: 0 DMRSTypeAPosition: 2 PDCCHConfigSIB1: 0 CellBarred: 0 IntraFreqReselection: 0 Simulink decoded MIB parameters NFrame: 105 SubcarrierSpacingCommon: 120 k_SSB: 0 DMRSTypeAPosition: 2 PDCCHConfigSIB1: 0 CellBarred: 0 IntraFreqReselection: 0
To generate the HDL code for this example, you must have the HDL Coder™ product. Use the
makehdltb commands to generate HDL code and an HDL test bench for the nrhdlMIBRecovery/MIB Recovery subsystem. The resulting HDL code is synthesized for a Xilinx® Zynq®-7000 ZC706 evaluation board. This table shows the post place and route resource utilization results for each model reference and the combined model. The design meets timing with a clock frequency of 200 MHz.
Resource nrhdlMIBRecovery nrhdlSSBDetectionCore nrhdlSSBDecodingCore _______________ ________________ _____________________ ____________________ Slice Registers 64317 55969 8302 Slice LUTs 43304 32380 11138 RAMB18 40 34 6 RAMB36 10 5 5 DSP48 207 170 37