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Hardware-Software Co-Design

Deploy hardware and software implementations of SDR algorithms on Xilinx® Zynq®-based radio hardware

With the Communications Toolbox™ Support Package for Xilinx Zynq-Based Radio, you can design an SDR algorithm in Simulink®, and then prototype your design on the Xilinx Zynq-based radio hardware. You can either deploy a hardware-software (HW/SW) co-design implementation partitioned between the ARM® processor and the FPGA fabric of the underlying system on chip (SoC), or prototype the design targeting the FPGA fabric only. The workflow is available in Simulink only.

Functions

sdrdevCreate radio object for interfacing with Xilinx Zynq-based radio hardware
downloadImageDownload SD card image or bitstream file

Objects

comm.SDRDevAD936xInterface with AD936x-based Zynq radio hardware
comm.SDRDevFMCOMMS5Interface with FMCOMMS5 Zynq radio hardware

Blocks

AD936x ReceiverReceive data from AD936x-based Zynq radio hardware
AD936x TransmitterSend data to AD936x-based Zynq radio hardware
FMCOMMS5 ReceiverReceive data from FMCOMMS5 Zynq radio hardware
FMCOMMS5 TransmitterSend data to FMCOMMS5 Zynq radio hardware

Topics

Configuration and Deployment

Hardware-Software Co-Design Overview

Learn the basics of the hardware-software co-design feature in this support package and its software requirements.

Installation for Hardware-Software Co-Design

Install and configure additional support packages and third-party tools required by hardware-software co-design workflow.

Hardware-Software Co-Design Workflow

Deploy partitioned hardware-software co-design implementations for SDR algorithms.

Guidelines for Configuring the Software Interface Model

Configure your model for continuous and packet-based transmission and reception.

System Timing

Explore ARM processor scheduler options for the software interface model.

FPGA Targeting Workflow

Prototype SDR algorithms on the FPGA fabric only.

Verification

Debug SDR Designs Using FPGA Data Capture

Debug HDL IP core of SDR design with FPGA Data Capture app.

Troubleshooting

Troubleshooting Hardware-Software Co-Design

Resolve issues encountered while using the hardware-software co-design workflow.

Featured Examples

5G NR MIB Recovery Using Analog Devices AD9361/AD9364

5G NR MIB Recovery Using Analog Devices AD9361/AD9364

Deploy a hardware-software co-design implementation of a MIB recovery algorithm for off-the-air 5G NR waveforms.

Open Example
5G NR SIB1 Recovery Using Analog Devices AD9361/AD9364

5G NR SIB1 Recovery Using Analog Devices AD9361/AD9364

Deploy a hardware-software co-design implementation of a SIB1 recovery algorithm for off-the-air 5G NR waveforms.

Open Example
HW/SW Co-Design with AXI4-Stream Using Analog Devices AD9361/AD9364

HW/SW Co-Design with AXI4-Stream Using Analog Devices AD9361/AD9364

Deploy a hardware-software co-design implementation of a waveform transmitter and receiver using AXI4-Stream.

Open Model
OFDM Transmit and Receive Using Analog Devices AD9361/AD9364

OFDM Transmit and Receive Using Analog Devices AD9361/AD9364

Deploy a hardware-software co-design implementation of an OFDM-based transmit and receive algorithm.

Open Example
HW/SW Co-Design QPSK Transmit and Receive Using Analog Devices AD9361/AD9364

HW/SW Co-Design QPSK Transmit and Receive Using Analog Devices AD9361/AD9364

Implement QPSK transmitter and receiver algorithm partitioned across the ARM and the FPGA fabric.

Open Model
HW/SW Co-Design Implementation of ADS-B Receiver Using Analog Devices AD9361/AD9364

HW/SW Co-Design Implementation of ADS-B Receiver Using Analog Devices AD9361/AD9364

Partition ADS-B receive functionality across the ARM and the FPGA fabric.

Open Model
LTE MIB Recovery and Cell Scanner Using Analog Devices AD9361/AD9364

LTE MIB Recovery and Cell Scanner Using Analog Devices AD9361/AD9364

Implement an LTE MIB recovery system partitioned across the ARM and the FPGA fabric and detect LTE cell signals in the vicinity.

Open Model
LTE SIB1 Recovery Using Analog Devices AD9361/AD9364

LTE SIB1 Recovery Using Analog Devices AD9361/AD9364

Recover the first system information block (SIB1) from an LTE downlink signal using ARM and FPGA resources.

Open Model

Communications Toolbox Support Package for Xilinx Zynq-Based Radio Documentation

Support

Bridging Wireless Communications Design and Testing with MATLAB

Bridging Wireless Communications Design and Testing with MATLAB

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