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Hardware-Software Co-Design

Deploy hardware and software implementations of SDR algorithms on Xilinx^® Zynq^®-based radio hardware

With the Communications Toolbox™ Support Package for Xilinx Zynq-Based Radio, you can design an SDR algorithm in Simulink^®, and then prototype your design on the Xilinx Zynq-based radio hardware. You can either deploy a hardware-software (HW/SW) co-design implementation partitioned between the ARM^® processor and the FPGA fabric of the underlying system on chip (SoC), or prototype the design targeting the FPGA fabric only. The workflow is available in Simulink only.

Functions

`sdrdev`	Create radio object for interfacing with Xilinx Zynq-based radio hardware
`downloadImage`	Download SD card image or bitstream file

Objects

`comm.SDRDevAD936x`	Interface with AD936x-based Zynq radio hardware
`comm.SDRDevFMCOMMS5`	Interface with FMCOMMS5 Zynq radio hardware

Blocks

AD936x Receiver	Receive data from AD936x-based Zynq radio hardware
AD936x Transmitter	Send data to AD936x-based Zynq radio hardware
FMCOMMS5 Receiver	Receive data from FMCOMMS5 Zynq radio hardware
FMCOMMS5 Transmitter	Send data to FMCOMMS5 Zynq radio hardware

Topics

Configuration and Deployment

Hardware-Software Co-Design Overview

Learn the basics of the hardware-software co-design feature in this support package and its software requirements.

Installation for Hardware-Software Co-Design

Install and configure additional support packages and third-party tools required by hardware-software co-design workflow.

Hardware-Software Co-Design Workflow

Deploy partitioned hardware-software co-design implementations for SDR algorithms.

Guidelines for Configuring the Software Interface Model

Configure your model for continuous and packet-based transmission and reception.

System Timing

Explore ARM processor scheduler options for the software interface model.

FPGA Targeting Workflow

Prototype SDR algorithms on the FPGA fabric only.

Verification

Debug SDR Designs Using FPGA Data Capture

Debug HDL IP core of SDR design with FPGA Data Capture app.

Troubleshooting

Troubleshooting Hardware-Software Co-Design

Resolve issues encountered while using the hardware-software co-design workflow.

Featured Examples

HW/SW Co-Design QPSK Transmit and Receive Using Analog Devices AD9361/AD9364

Implement algorithms on the Zynq radio platform that are partitioned across the ARM and the FPGA fabric. QPSK transmit and receive functions are implemented in hardware and software and mapped to the radio platform as shown in the diagram below.

Open Model

HW/SW Co-Design Implementation of ADS-B Transmitter/Receiver Using Analog Devices AD9361/AD9364

Implement algorithms on the Zynq radio platform that are partitioned across the ARM and the FPGA fabric. Specifically, this example concerns the reception and decoding of Automatic Dependent Surveillance Broadcast (ADS-B) transmissions, with receive functionality implemented in hardware and software, and a transmit waveform embedded in hardware.

Open Model

LTE MIB Recovery and Cell Scanner Using Analog Devices AD9361/AD9364

Implement an LTE MIB recovery system on the Zynq radio platform that is partitioned across the ARM and the programmable logic (PL) fabric. The FPGA image generated is then used as the base for building an LTE cell scanner to detect LTE cell signals in the vicinity.

Open Model