C28x SPI Receive

Receive data through Serial Peripheral Interface (SPI) on target

  • Library:
  • Embedded Coder Support Package for Texas Instruments C2000 Processors / C2802x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2803x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2805x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2806x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C280x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C281x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2833x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2834x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F2807x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xD

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xS

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F28004x

    Embedded Coder Support Package for Texas Instruments C2000 F28M3x Concerto Processors / F28M35x / C28x

    Embedded Coder Support Package for Texas Instruments C2000 F28M3x Concerto Processors / F28M36x / C28x

Description

The SPI Receive block supports synchronous, serial peripheral input/output port communications between the processor and external peripherals or other controllers. The block can run in either slave or master mode. In master mode, the SPISIMO pin transmits data, and the SPISOMI pin receives the data. When master mode is selected, the SPI initiates the data transfer by sending a serial clock signal (SPICLK), which is used for the entire serial communications link. Data transfers are synchronized to this SPICLK, which enables both master and slave to send and receive data simultaneously. The maximum frequency for the clock is one quarter of the processor clock frequency.

The SPI device receives data and places the data in the receive buffer. The SPI Receive block reads the data from the receive buffer. In master mode, the C28x SPI Transmit block initiates SPI transmission by writing data to the transmit buffer. Then, the data received in the receive buffer is read by the SPI Receive block. In slave mode, the SPI Receive block is used to read the data in the receive buffer, which is received from the master. Then, the data is written into the transmit buffer using the SPI Transmit block. From the transmit buffer, the data is sent to the master.

Configure the SPI modules for a specific hardware board by navigating to Hardware Implementation > Target hardware resources. Verify that these settings meet the requirements of your application.

Ports

Output

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The data read from the device over the SPI interface.

Data Types: uint16

Status of receipt of data. Error status values indicate:

  • 0 — No errors.

  • 1 — Data loss occurred because of overflow.

  • 2 — Data not ready. A time out occurred while the block was waiting to receive data.

Dependencies

This port appears only when Enable blocking mode is not selected.

Data Types: uint16

Parameters

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Main

The SPI module to which the SPI slave device is connected. Each processor has a different number of modules.

The clock polarity used for SPI communication mode. This parameter must be the same for both transmit and receive blocks.

The clock phase used for SPI communication mode. This parameter must be the same for both transmit and receive blocks.

The received data is a vector of type uint16 and the data length is as specified in this parameter (not bytes).

When this option is selected, the algorithm waits until data is received before continuing processing.

Sample time for the block in seconds. To execute this block asynchronously, set this parameter to -1.

Advanced

Length in bits of each transmitted or received character. For example, if you select 8, the maximum value that can be transmitted using SPI is 28–1. If you send data greater than this value, the buffer overflows. This parameter must be the same for both transmit and receive blocks.

The SPI master uses these methods to select SPI slave devices:

  • Provided by the SPI peripheral — The SPI master uses the STE pin assignment provided in Hardware Implementation > Target hardware resources > SPI to select the slave device. Slave select and deselect are handled by the SPI peripheral.

  • Explicit GPIO calls — The SPI master uses the general purpose input/output pins instead of the STE pin of the SPI peripheral to select/deselect SPI slave devices. The SPI Receive block deselects the slave using GPIO pins after receiving data. To select the slave, the C28x SPI Transmit block must be used along with the SPI Receive block. Use this option only in master mode. Select the Enable blocking mode option to ensure that the SPI transmission is complete before the slave is deselected.

The logic levels supported by the slave select pin to select the SPI slave device.

  • Active low — The device is enabled on logic low. The SPI slave device is enabled when its slave select pin is set to low.

  • Active high — The device is enabled on logic high. The SPI slave device is enabled when its slave select pin is set to high.

Dependencies

This option appears only when Slave select calling method is set to Explicit GPIO calls.

The general purpose input/output pin that serves as the slave select for SPI.

Dependencies

This option appears only when Slave select calling method is set to Explicit GPIO calls.

Introduced in R2017b