C28x I2C Receive

Configure inter-integrated circuit (I2C) module to receive data from I2C bus

  • Library:
  • Embedded Coder Support Package for Texas Instruments C2000 Processors / C2802x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2803x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2805x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2806x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C280x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2833x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / C2834x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F2807x

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xD

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xS

    Embedded Coder Support Package for Texas Instruments C2000 Processors / F28004x

    Embedded Coder Support Package for Texas Instruments C2000 F28M3x Concerto Processors / F28M35x / C28x

    Embedded Coder Support Package for Texas Instruments C2000 F28M3x Concerto Processors / F28M36x / C28x

Description

The I2C Receive block configures the inter-integrated circuit (I2C) module to receive data from the two-wire I2C serial bus. The I2C Receive block supports I2C bus communication between the processor and external peripherals or other controllers. The block can run in either slave or master mode.

When the I2C module is configured as master, the module receives data from a slave. When the I2C module is configured as a slave, the module receives data from the master. Configure the I2C module by navigating to Configuration Parameters > Hardware Implementation > Target hardware resources.

To read data from a slave, send the address of the register to be read using the I2C Transmit block to the slave. Ensure that the data is sent from the Tx FIFO to the slave before the data is read from the slave using the I2C Receive block. For more information, see Using the I2C Bus to Access Sensors.

Ports

Input

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The slave address register value.

Dependencies

This port appears only when Slave address source is set to Input port.

Data Types: int8 | uint8 | int16 | uint16 | int32 | uint32 | single | double | Boolean

Output

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The data read from the I2C bus.

Data Types: int8 | uint8 | int16 | uint16 | int32 | uint32

Status values from the I2C status register (I2CSTR).

Dependencies

This port appears only when Output receiving status is selected.

Data Types: uint16

Parameters

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The I2C module to be used for communication. The number of I2C modules supported varies across different C2000™ processors.

The address format for communication. The diagram shows the format for each option. The I2C Receive block sets the R/W bit to 0.

S — Start bit

R/W — Read/Write

ACK — Acknowledge

P — Stop bit

MSB — Most significant bit

LSB — Least significant bit

The method for setting the slave address register of the I2C slave.

Enter a 7- or 10-bit slave address according to the addressing format selected.

Dependencies

This parameter appears only when Slave address source is set to Specify via dialog.

The number of bits in the data byte received by the I2C module.

The number of Data type the block receives (not bytes). If this parameter is set to more than 1, the output will be a vector.

The value the I2C node outputs to the model before it has received data. By default, the block outputs 0 if the I2C value is not received.

Generates a no-acknowledge bit (NACK) during the I2C acknowledge cycle and ignores new bits from the transmitting I2C node.

Enables the I2C Receive block (master) to send a stop message to the I2C Transmit block (slave).

Enables the status output port, which indicates when the I2C Receive block receives a message.

Sample time for the block in seconds. To execute this block asynchronously, set this parameter to -1.

Sets the data type of the data received. If the size of the received data is less than 8 bits, then the data is right-justified.