Documentation

This is machine translation

Translated by Microsoft
Mouseover text to see original. Click the button below to return to the English version of the page.

Note: This page has been translated by MathWorks. Click here to see
To view all translated materials including this page, select Country from the country navigator on the bottom of this page.

HDL Verifier Support Package for Microsemi FPGA Boards

Debug and test HDL code on Microsemi FPGAs using FPGA-in-the-loop

HDL Verifier™ Support Package for Microsemi® FPGA Boards contains the board definition files for FPGA-in-the-loop (FIL) simulation with HDL Verifier and supported Microsemi FPGA and SoC FPGA boards. With FIL simulation, use MATLAB® or Simulink® to test designs in real hardware for any existing HDL code. The HDL code can either be manually written or generated from a model subsystem.

Setup and Configuration

Install hardware support, update firmware, configure hardware connection

FPGA-in-the-Loop Simulation

Verification with FPGA hardware