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HDL Coder Support Package for Microchip FPGA and SoC Devices

Generate code for Microchip FPGAs and the FPGA portion of SoC Devices

HDL Coder™ Support Package for Microchip FPGA and SoC Devices supports the generation of IP cores that can be integrated into FPGA designs using Microchip Libero® Design Suite.

This support package includes reference designs for popular Microchip development kits, so you can generate HDL code and port mappings to I/O, AXI registers, and interfacing with DDR memory. And it supports the HDL Coder custom reference design API to develop reference designs for a variety of boards based on Microchip devices.

Setup and Configuration

Download and install support package for use with third-party EDA tools and supported hardware

Custom IP Core Generation

Generate HDL IP core from your DUT for deployment to the default system reference design or custom reference design registered with the board

Custom Board and Reference Design

Define and register custom reference design or custom board for Microchip SoC device


Create bitstream containing user programming and download it to Microchip SoC platform