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SPI Master Transfer

Write data to and read data from SPI slave device

  • Library:
  • Simulink Coder Support Package for BBC micro:bit/Basic

    Simulink Coder Support Package for STMicroelectronics Nucleo Boards/ Common

    Simulink Coder Support Package for STMicroelectronics Discovery Boards/ STM32F746G-Discovery

    Simulink Coder Support Package for STMicroelectronics Discovery Boards/ STM32F769I-Discovery

Description

The SPI Master Transfer block writes data to and reads data from a slave device over the Serial Peripheral Interface (SPI) interface. The block outputs an array of the same size and data type as the input values. You can use this block with Byte Pack and Byte Unpack blocks to support heterogeneous data type transfers.

Using this block, you can access an SPI device to measure quantities such as temperature, pressure.

For more information on SPI communication, see Support SPI Communication.

Ports

Input

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The port accepts the data to write to the registers of a slave device over the SPI interface.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32

Output

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The port outputs the data read from the registers of a slave device over the SPI interface.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32

Parameters

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Main

Specify the SPI module to which the SPI slave device is connected.

Specify the pin number on the board to which the SPI slave device is connected. The SPI master pulls the SS pin of the selected slave to a low (0) value to start the communication. The slave is selected depending on the pin polarity that you specify in the Slave select pin polarity parameter. The master can select only one slave at a time.

Select the order in which the data is transmitted.

  • Most significant bit (MSB) — Select MSB to send the most significant bit (MSB) first.

  • Least significant bit (LSB) — Select LSB to send the least significant bit (LSB) first.

An SPI master sets the clock polarity (CPOL) and the clock phase (CPHA).

The combination of polarity and phase are referred to as SPI modes. The SPI modes 0–3 are shown in the table.

ModeClock Polarity (CPOL)Clock Phase (CPHA)
001
100
211
310

For more information on register read/write, see SPI Transfer Modes.

Advanced

The logic levels supported by Slave select pin to select the SPI slave device.

  • Active low — The device is enabled on logic low. The SPI slave device gets enabled when its SS pin is set to low.

  • Active high — The device is enabled on logic high. The SPI slave device gets enabled when its SS pin is set to high.