This is machine translation

Translated by Microsoft
Mouseover text to see original. Click the button below to return to the English version of the page.

Note: This page has been translated by MathWorks. Click here to see
To view all translated materials including this page, select Country from the country navigator on the bottom of this page.

Design Complex Logic

Follow common design patterns for supervisory logic

Use Stateflow® charts for common supervisory control applications such as scheduling Simulink® subsystems, debouncing transient signals, and managing system failures.