# PNP Bipolar Transistor

PNP bipolar transistor using enhanced Ebers-Moll equations

**Library:**Simscape / Electrical / Semiconductors & Converters

## Description

The PNP Bipolar Transistor block uses a variant of the Ebers-Moll equations to represent an PNP bipolar transistor. The Ebers-Moll equations are based on two exponential diodes plus two current-controlled current sources. The PNP Bipolar Transistor block provides the following enhancements to that model:

Early voltage effect

Optional base, collector, and emitter resistances.

Optional fixed base-emitter and base-collector capacitances.

The collector and base currents are [1]:

$$\begin{array}{l}{I}_{C}=-IS\left[\left({e}^{-q{V}_{BE}/(k{T}_{m1})}-{e}^{-q{V}_{BC}/(k{T}_{m1})}\right)\left(1+\frac{{V}_{BC}}{{V}_{A}}\right)-\frac{1}{{\beta}_{R}}\left({e}^{-q{V}_{BC}/(k{T}_{m1})}-1\right)\right]\\ {I}_{B}=-IS\left[\frac{1}{{\beta}_{F}}\left({e}^{-q{V}_{BE}/(k{T}_{m1})}-1\right)+\frac{1}{{\beta}_{R}}\left({e}^{-q{V}_{BC}/(k{T}_{m1})}-1\right)\right]\end{array}$$

Where:

*I*and_{B}*I*are base and collector currents, defined as positive into the device._{C}*IS*is the saturation current.*V*is the base-emitter voltage and_{BE}*V*is the base-collector voltage._{BC}*β*is the ideal maximum current gain BF_{F}*β*is the ideal maximum current gain BR_{R}*V*is the forward Early voltage VAF_{A}*q*is the elementary charge on an electron (1.602176e-19 Coulombs).*k*is the Boltzmann constant (1.3806503e-23 J/K).*T*_{m1}is the transistor temperature, as defined by the**Measurement temperature**parameter value.

You can specify the transistor behavior using datasheet parameters that the block uses to calculate the parameters for these equations, or you can specify the equation parameters directly.

If –*q**V*_{BC} /
(*k**T*_{m1}) >
40 or –*q**V*_{BE} /
(*k**T*_{m1}) >
40, the corresponding exponential terms in the equations are replaced
with (–*q**V*_{BC} /
(*k**T*_{m1}) –
39)*e*^{40} and (–*q**V*_{BE} /
(*k**T*_{m1}) –
39)*e*^{40}, respectively. This helps prevent numerical issues associated with the
steep gradient of the exponential function *e*^{x} at large values of *x*. Similarly, if –*q**V*_{BC} /
(*k**T*_{m1}) <
–39 or –*q**V*_{BE} /
(*k**T*_{m1}) <
–39 then the corresponding exponential terms in the equations are replaced
with (–*q**V*_{BC} /
(*k**T*_{m1}) +
40)*e*^{–39} and (–*q**V*_{BE} /
(*k**T*_{m1}) +
40)*e*^{–39}, respectively.

Optionally, you can specify fixed capacitances across the base-emitter and base-collector junctions. You also have the option to specify base, collector, and emitter connection resistances.

### Modeling Temperature Dependence

The default behavior is that dependence on temperature is not modeled, and the device is simulated at the temperature for which you provide block parameters. You can optionally include modeling the dependence of the transistor static behavior on temperature during simulation. Temperature dependence of the junction capacitances is not modeled, this being a much smaller effect.

When including temperature dependence, the transistor defining equations remain
the same. The measurement temperature value,
*T*_{m1}, is replaced with the simulation
temperature, *T*_{s}. The saturation current,
*IS*, and the forward and reverse gains
(*β _{F}* and

*β*) become a function of temperature according to the following equations:

_{R}$$I{S}_{Ts}=I{S}_{Tm1}\cdot {({T}_{s}/{T}_{m1})}^{XTI}\cdot \mathrm{exp}\left(-\frac{EG}{k{T}_{s}}(1-{T}_{s}/{T}_{m1})\right)$$

$${\beta}_{Fs}={\beta}_{Fm1}{\left(\frac{{T}_{s}}{{T}_{m1}}\right)}^{XTB}$$

$${\beta}_{Rs}={\beta}_{Rm1}{\left(\frac{{T}_{s}}{{T}_{m1}}\right)}^{XTB}$$

where:

*T*_{m1}is the temperature at which the transistor parameters are specified, as defined by the**Measurement temperature**parameter value.*T*_{s}is the simulation temperature.*IS*_{Tm1}is the saturation current at the measurement temperature.*IS*_{Ts}is the saturation current at the simulation temperature. This is the saturation current value used in the bipolar transistor equations when temperature dependence is modeled.*β*_{Fm1}and*β*_{Rm1}are the forward and reverse gains at the measurement temperature.*β*_{Fs}and*β*_{Rs}are the forward and reverse gains at the simulation temperature. These are the values used in the bipolar transistor equations when temperature dependence is modeled.*EG*is the energy gap for the semiconductor type measured in Joules. The value for silicon is usually taken to be 1.11 eV, where 1 eV is 1.602e-19 Joules.*XTI*is the saturation current temperature exponent.*XTB*is the forward and reverse gain temperature coefficient.*k*is the Boltzmann constant (1.3806503e–23 J/K).

Appropriate values for *XTI* and *EG* depend on
the type of transistor and the semiconductor material used. In practice, the values
of *XTI*, *EG*, and *XTB* need
tuning to model the exact behavior of a particular transistor. Some manufacturers
quote these tuned values in a SPICE Netlist, and you can read off the appropriate
values. Otherwise you can determine values for *XTI*,
*EG*, and *XTB* by using a datasheet-defined
data at a higher temperature *T*_{m2}. The
block provides a datasheet parameterization option for this.

You can also tune the values of *XTI*, *EG*, and
*XTB* yourself, to match lab data for your particular device.
You can use Simulink^{®}
Design Optimization™ software to help tune the values.

### Thermal Port

The block has an optional thermal port, hidden by default. To expose the thermal port,
right-click the block in your model, and then from the context menu select
**Simscape** > **Block choices** >
**Show thermal port**. This action displays the thermal port
**H** on the block icon, and exposes the **Thermal
Port** parameters.

Use the thermal port to simulate the effects of generated heat and device temperature. For
more information on using thermal ports and on the **Thermal Port**
parameters, see Simulating Thermal Effects in Semiconductors.

## Assumptions and Limitations

The block does not account for temperature-dependent effects on the junction capacitances.

You may need to use nonzero ohmic resistance and junction capacitance values to prevent numerical simulation issues, but the simulation may run faster with these values set to zero.

## Ports

### Conserving

## Parameters

## Model Examples

## Compatibility Considerations

## References

[1] G. Massobrio and P. Antognetti. *Semiconductor
Device Modeling with SPICE*. 2nd Edition, McGraw-Hill,
1993.

[2] H. Ahmed and P.J. Spreadbury. *Analogue and
digital electronics for engineers*. 2nd Edition, Cambridge University
Press, 1984.