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Code Generation Report Parameters

This page describes configuration parameters that reside in the HDL Code Generation > Report pane of the Configuration Parameters dialog box. Enable these parameters to see the Summary, Code Interface Report, and reports that display traceability information, resource utilization, and effect of optimizations on your design.

Generate traceability report

Enable or disable generation of an HTML code generation report with hyperlinks from code to model and model to code. The report provides line-level traceability for each block in your Simulink® model. When you click the hyperlink beside a certain line of code in the report, HDL Coder™ highlights the corresponding block in your Simulink model. When you select a certain block in your model, the report highlights all lines of code corresponding to that block.

Settings

Default: Off

On

Create and display a traceability report section in the HTML code generation report. To generate the report, after you enable this setting, click the Generate button. The code generation report contains a summary section and a code interface report along with the traceability report.

Off

Do not create an HTML code generation report.

Dependency

When you select this check box, you can select the Traceability style. By default, the Traceability style is Line Level.

Command-Line Information

Property: Traceability
Type: character vector
Value: 'on' | 'off'
Default: 'off'

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

For example, you can generate a traceability report when generating HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Pass in the Traceability property as an argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir','Traceability','on')

  • Enable the Traceability property using hdlset_param and then use makehdl.

    hdlset_param('sfir_fixed','Traceability','on')
    makehdl('sfir_fixed/symmetric_fir')

You can use the RequirementComments property to generate hyperlinked requirements comments within the HTML code generation report. The requirements comments link to the corresponding requirements documents for your model.

See Also

Traceability style

You can use Traceability style to specify whether you want to generate line-level or comment-based hyperlinks in the traceability report.

Settings

Default: Line Level

The options are:

Line Level

By default, HDL Coder generates a line-level traceability report that contains hyperlinks from each line of HDL code to the corresponding block in your Simulink model. The traceability report that is generated by using this style does not contain hyperlinked comments above the HDL code corresponding to a certain block. When you select a certain block and navigate to the HDL code, the code generator highlights all lines of code corresponding to that block.

Comment Based

If you specify generation of a comment-based traceability report, the report contains hyperlinked comments above a block of HDL code. The comments contain a traceability tag that contains a searchable pattern of the format <system>/blockname. <system> is the root model or a Subsystem inside the model, and blockname is the name of the block inside that model or Subsystem.

For example, if you have a model, foo, that has a Subsystem, outer, and a nested Subsystem, Inner, then the <System> tag is:

  • <Root>: foo

  • <S1>: foo/outer

  • <S2>: foo/outer/inner

Dependency

To specify this setting, select the Generate traceability report check box.

Command-Line Information

Property: TraceabilityStyle
Type: character vector
Value: 'LineLevel' | 'CommentBased'
Default: 'LineLevel'

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

For example, when you generate a traceability report for the symmetric_fir subsystem inside the sfir_fixed model, specify the TraceabilityStyle by using either of these methods:

  • Pass in the TraceabilityStyle property as an argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir','Traceability','on',...
                        'TraceabilityStyle','CommentBased')

  • Enable the TraceabilityStyle property using hdlset_param, and then use makehdl.

    hdlset_param('sfir_fixed','Traceability','on')
    hdlset_param(gcs,'TraceabilityStyle','CommentBased')
    makehdl('sfir_fixed/symmetric_fir')

See Also

Generate model Web view

Include the model Web view in the HDL Code Generation report to navigate between the code and model within the same window. With a model Web view, you can click a link in the generated code to highlight the corresponding block in the model. Using this capability, you can review, analyze, and debug the generated HDL code. You can share your model and generated code outside of the MATLAB® environment.

Settings

Default: Off

On

Include model Web view in the Code Generation report. To generate the report, after you enable this setting, click the Generate button. The code generation report contains a summary section and a code interface report along with the model web view.

Off

Do not include model Web view in the Code Generation report.

Dependencies

To include a Web view (Simulink Report Generator) of the model in the Code Generation report, you must have Simulink Report Generator™ installed.

Command-Line Information

Parameter: HDLGenerateWebview
Type: character vector
Value: 'on' | 'off'
Default: 'off'

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

For example, you can generate a model web view when generating HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Pass in the HDLGenerateWebview property as an argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir','HDLGenerateWebview','on')

  • Enable the HDLGenerateWebview property using hdlset_param and then use makehdl.

    hdlset_param('sfir_fixed','HDLGenerateWebview','on')
    makehdl('sfir_fixed/symmetric_fir')

See Also

Generate resource utilization report

Enable or disable generation of an HTML resource utilization report. The report contains a summary and detailed information about the number of hardware resources, such as multipliers, adders, and registers that are used in the generated HDL code. If you have floating-point data types in your model, you can generate HDL code with native floating point support or map your design to Intel® or Xilinx® FPGA floating-point libraries. The resource utilization report displays a target-specific report corresponding to FPGA floating-point library mapping and a resource report corresponding to HDL code in native floating-point mode.

Settings

Default: Off

On

Create and display an HTML resource utilization report. To generate the report, after you enable this setting, click the Generate button. The code generation report contains a summary section and a code interface report along with the resource utilization report.

Off

Do not create an HTML resource utilization report.

Command-Line Information

Property: ResourceReport
Type: character vector
Value: 'on' | 'off'
Default: 'off'

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

For example, you can generate a resource utilization report when generating HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Pass in the ResourceReport property as an argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir','ResourceReport','on')

  • Enable the ResourceReport property using hdlset_param and then use makehdl.

    hdlset_param('sfir_fixed','ResourceReport','on')
    makehdl('sfir_fixed/symmetric_fir')

See Also

Generate high-level timing critical path report

Specify whether to generate a highlighting script that shows the estimated critical path. The report displays the critical path delay and generates a highlighting script as a link that you can click to highlight the estimated critical path in the generated model. If your design contains blocks without timing information, the report displays the link to another highlighting script that is generated to highlight those blocks.

Settings

Default: Off

On

Generate a highlighting script that shows the estimated critical path. To generate the report, after you enable this setting, click the Generate button. The code generation report contains a summary section and a code interface report along with the critical path estimation report.

To estimate the critical path for single-precision floating-point models, use the Native Floating Point mode. In the Configuration Parameters dialog box, on the HDL Code Generation > Global Settings > Floating Point Target tab, set Library to Native Floating Point

Off

Do not calculate the estimated critical path.

Command-Line Information

Property: CriticalPathEstimation
Type: character vector
Value: 'on' | 'off'
Default: 'off'

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

For example, you can generate a critical path estimation report when generating HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Pass in the CriticalPathEstimation property as an argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir','CriticalPathEstimation','on')

  • Enable the CriticalPathEstimation property using hdlset_param and then use makehdl.

    hdlset_param('sfir_fixed','CriticalPathEstimation','on')
    makehdl('sfir_fixed/symmetric_fir')

See Also

Generate optimization report

Enable or disable generation of an HTML optimization report. The report contains information about the results of distributed pipelining, streaming, sharing, delay balancing, and adaptive pipelining optimizations that are implemented in the generated code. The report includes hyperlinks back to referenced blocks, subsystems, or validation models. If you have floating-point data types in your model, you can generate HDL code with native floating point support or map your design to Intel or Xilinx FPGA floating-point libraries. When you map to FPGA floating-point libraries, the optimization report displays a target code generation section that displays the target device summary and a link to the generated model.

Settings

Default: Off

On

Create and display an HTML optimization report. To generate the report, after you enable this setting, click the Generate button. The code generation report contains a summary section and a code interface report along with the optimization report.

Off

Do not create an HTML optimization report.

Command-Line Information

Property: OptimizationReport
Type: character vector
Value: 'on' | 'off'
Default: 'off'

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

For example, you can generate an optimization report when generating HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Pass in the OptimizationReport property as an argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir','OptimizationReport','on')

  • Enable the OptimizationReport property using hdlset_param and then use makehdl.

    hdlset_param('sfir_fixed','OptimizationReport','on')
    makehdl('sfir_fixed/symmetric_fir')

See Also