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Find Signal Delay

Use the Find Delay block to find the delay between two signals. The Find Delay block has a Correlation window length parameter that must be adjusted based on the delay between to the signals. When the correlation window length is too short, the computed delay will not be correct.

Examine Model

The Bernoulli Binary Generator block is configured to output one sample per second. The output branches to an upper and lower path. The upper path provides a reference signal to the Find Delay block. The lower path provides a delay path to the Find Delay block. A Delay (Simulink) block inserts a delay of 10 samples in the lower path. The Find Delay block compares the two input signals and outputs the calculated delay and the delay change flag. The chg port outputs 0 when the value of the computed delay stays constant for longer than the correlation window length. The chg port outputs 1 to indicate a delay change in the previous correlation window. A time scope displays the delay and the chg outputs of the Find Delay block.

Run Model

Run the model with the Correlation window length parameter set to 15 samples. Observe the chg port output variation over time. Because there is no prior correlation period data for comparison, ignore the Find Delay block outputs for the first correlation window period (time 0 to 15 s).

After the first correlation window period, the calculated delay output shows delay variation over time. For all but one of the correlation windows, the chg port outputs 1 indicating a delay change in the previous correlation window. This result indicates that the correlation window length is too short for the Find Delay block to accurately compute the delay between the two signals.

Run the model with the Correlation window length parameter of the Find Delay block set to 40 samples.

For this run, the calculated delay settles at 10 samples at the 40 second mark, and the chg port toggles to 1 for just one of the correlation window length periods. After the second correlation window period (at the 80 second mark), the computed delay output is stabilized and the chg output toggles to 0 for the remainder of the run.